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Your search returned 18 records. Click on the hyperlinks to view further details of Titles.. |
Magazine Name : Ieee Transactions On Very Large Scale Intergration (Vlsi) Systems
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Year : 2001 Volume number : 09 Issue: 02 |
Fpga Prototyping Of A Risc Processor Core For Embedded Applications
(Article)
Subject:
Application-Specific Processors
,
Embedded Systems
,
Field-Programmable Gate Array (Fpga) Protyping
,
Hardware/Software Codesign
Author:
M.
Gschwind
V.
Salapura
D.
Maurer
page:
241
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250
Unified Functional Decomposition Via Encoding For Fpga Technology Mapping
(Article)
Subject:
Compatible Class Encoding
,
Fpga
,
Functional Decomposition
,
Technology Mapping
Author:
J.-H.
Jiang
J.-Y.
Jou
J.-D.
Huang
page:
251
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260
Reconfigurable Parallel Inner Product Processor Architectures
(Article)
Subject:
Array Multiplier
,
Digital Design
,
Parallel Counters
,
Parallel Inner Product Processor
Author:
R.
Lin
page:
261
-
272
An Approach To Automated Hardware/Software Partitioning Using A Flexible Granularity That Is Driven By High-Level Estimation Techniques
(Article)
Subject:
Automated Hardware/Software Partitioning
,
Embedded Systems
,
Partitioning Granularity
,
High-Level Estimation
Author:
J.
Henkel
R.
Ernst
page:
273
-
289
A Built-In Self-Test Method For Diagnosis Of Synchronous Sequential Circuits
(Article)
Subject:
Built-In Self-Test (Bist)
,
Fault-Diagnosis
,
Synchronous Sequential Circuits
Author:
I.
Pomeranz
S. M.
Reddy
page:
290
-
296
A Hardware Cost Minimized Fast Phong Shader
(Article)
Subject:
Adaptive Computing
,
Computer Arithmetic
,
High Performance
Author:
H.-C.
Shin
J.-A.
Lee
L. S
Kim
page:
297
-
304
Memory Optimization Of Map Turbo Decoder Algorithms
(Article)
Subject:
Maximum A Posteriori (Map) Algorithm
,
Memory Optimization
,
Turbo Codes
Author:
C.
Schurgers
F.
Catthoor
M.
Engels
page:
305
-
312
Architecture And Design Of Nx-2700: A Programmable Single-Chip Hdtv All-Format-Decode-And-Display Processor
(Article)
Subject:
Advance Television Systems Committee (Atsc)
,
Chip Design
,
Digital Television (Dtv)
,
High-Definition Television (Hdtv)
Author:
S
Dutta
page:
313
-
328
Vector Generation For Power Supply Noise Estimation And Verification Of Deep Submicron Designs
(Article)
Subject:
Genetic Algorithm (Ga)
,
Lower Bound
,
Pattern Generation
,
Power Network Simulation
Author:
Y. M
Jiang
K. T
Cheng
page:
329
-
340
Fast Floorplanning For Effective Prediction And Construction
(Article)
Subject:
Construction
,
Prediction
,
Floorplanning
Author:
A.
Ranjan
K.
Bazargan
S.
Ogrenci
M.
Sarrafzadeh
page:
341
-
351
A Physical Design Tool For Built-In Self-Repairable Rams
(Article)
Subject:
Built-In-Self-Test (Bist)
,
Die Cost
,
Yield
,
Reliability
Author:
K.
Chakraborty
S.
Kulkarni
M.
Bhattacharya
P.
Mazumder
page:
352
-
364
Design Of Synchronous And Asynchronous Variable-Latency Pipelined Multipliers
(Article)
Subject:
Arithmetic Unit
,
Multiplier
,
Vlsi Design
Author:
M
Olivieri
page:
365
-
376
Partial Bus-Invert Coding For Power Optimization Of Application-Specific Systems
(Article)
Subject:
Digital Complementary Metal-Oxide-Semiconductor (Cmos)
,
Low-Power Dissipation
,
Memory
,
Switching Activity
Author:
Y
Shin
S.-I
Chae
K
Choi
page:
377
-
382
Architecture Driven Circuit Partitioning
(Article)
Subject:
Field-Progammable Gate Arrays
,
Folded-Clos Network Interconnection Architecture
,
Multi-Fpga Emulation System
,
Partitioning
Author:
C.-S
Chen
T. T
Hwang
C.-L
Liu
page:
383
-
389
Dual-Threshold Voltage Assignment With Transister Sizing For Low Power Cmos Circuits
(Article)
Subject:
Digital Complementary Metal-Oxide-Semiconductor (Cmos)
,
Low-Power Design
,
Low Voltage
,
Power Consumption Model
Author:
P
Pant
R. K
Roy
A.
Chatterjee
page:
390
-
393
Low-Power Cmos With Subvolt Supply Voltages
(Article)
Subject:
Vlsi
,
Digital Complementary Metal-Oxide-Semiconductor (Cmos)
,
Low-Power Design
,
Low Voltage
Author:
M. R
Stan
page:
394
-
399
Power Estimation For Large Sequential Circuits
(Article)
Subject:
Finite-State Machine (Fsm)
,
Power Estimation
,
Sequential Circuit
Author:
J. N
Kozhaya
F. N
Najm
page:
400
-
406
A Partitioning Algorthm For Technology-Mapped Design On Single-Chip Emulation Systems
(Article)
Subject:
Integer Programming
,
Field-Programmable Gate Array (Fpga) Emulation
,
Fpga Partitioning
,
Schedule Optimization
Author:
A
Ejnioui
N
Ranganathan
page:
407
-
410
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